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datasheet stv8162 - STV8162D +5 v, +5 v and +8 v triple-voltage regulator with disable and reset functions ? february 2004 1/12 key features input voltage range between 7 v and 18 v output currents up to 600 ma fixed precision output 1 voltage of 5 v 2% fixed precision output 2 voltage of 5 v 2% fixed precision output 3 voltage of 8 v 2% output 1 with reset facility outputs 2 and 3 can be disabled by digital input short circuit protection on each output thermal protection low dropout voltages description the stv8162 and STV8162D are monolithic triple positive voltage regulators designed to provide three fixed precision output voltages of 5 v, 5 v and 8 v for currents up to 0.6 a. an internal reset circuit generates a reset pulse when the voltage of output 1 drops below the regulated voltage value. outputs 2 and 3 can be disabled by a digital input. short-circuit and thermal protections are included in all versions. clipwatt 11 order code: stv8162 power dip 18 (9 + 9) order code: STV8162D 9 8 7 6 5 4 3 2 1 input3 output3 input2 output2 input1 output1 delay capacitor reset disable 10 11 12 13 14 15 16 17 18 nc input3 output3 input2 ground output2 input1 output1 delay capacitor reset disable ground ground ground ground ground ground ground ground ground top view 11 10 9 8 7 6 5 4 3 2 1 .com .com .com
general information stv8162 - STV8162D 2/12 1 general information figure 1: stv8162 block diagram figure 2: STV8162D block diagram 4 regulator 1 1 3 reference input1 output1 reset delay capacitor 2 protections 7 regulator 2 5 input2 output2 9 8 regulator 3 11 10 input3 disable output3 not connected ground 6 4 regulator 1 1 3 reference input1 output1 reset delay capacitor 2 protections 6 regulator 2 5 input2 output2 8 7 regulator 3 9 input3 disable output3 ground pins 10 to 18 .com .com .com .com
3/12 stv8162 - STV8162D electrical characteristics 2 electrical characteristics 2.1 absolute maximum ratings 2.2 thermal data 2.3 electrical characteristics t amb = 25 c, v in1 = 7 v, v in2 = 7 v and v in3 = 10 v, unless otherwise specified. symbol parameter value unit v in dc input voltage at pins input1, input2 and input3 20 v v dis disable input voltage at pin disable 20 v v rst output voltage at pin reset 20 v i output output currents internally limited p t power dissipation internally limited t stg storage temperature -65 to +150 c t j junction temperature 0 to +150 c symbol parameter value unit r thjc junction-to-case thermal resistance stv8162 STV8162D 3 15 c/w r thja junction-to-ambient thermal resistance 1 1. mounted on board. for more information, refer to section 5 . stv8162 STV8162D 10 56 c/w t j maximum recommended junction temperature 140 c t oper operating free air temperature range 0 to +70 c symbol parameter test conditions min. typ. max. unit v out1 output voltage i out1 = 10 ma 4.90 5.00 5.10 v v out2 output voltage i out2 = 10 ma 4.90 5.00 5.10 v v out3 output voltage i out3 = 10 ma 7.84 8.00 8.16 v v out1 output voltage 7 v < v in1 < 12 v 5 ma < i out1 < 600 ma 4.80 5.20 v v out2 output voltage 7 v < v in2 < 12 v 5 ma < i out2 < 600 ma 4.80 5.20 v v out3 output voltage 10 v < v in3 < 15 v 5 ma < i out3 < 600 ma 7.68 8.32 v .com .com .com .com
electrical characteristics stv8162 - STV8162D 4/12 v io1 dropout voltage i out1 = 0.6 a 11.4v v io2 dropout voltage i out2 = 0.6 a 11.4v v io3 dropout voltage i out3 = 0.6 a 11.4v v out1li line regulation 7 v < v in1 < 12 v, i out1 = 200 ma 50 mv v out2li line regulation 7 v < v in2 < 12 v, i out2 = 200 ma 50 mv v out3li line regulation 10 v < v in3 < 15 v, i out3 = 200 ma 80 mv v out1lo load regulation 5 ma < i out1 < 600 ma 100 mv v out2lo load regulation 5 ma < i out2 < 600 ma 100 mv v out3lo load regulation 5 ma < i out3 < 600 ma 160 mv i q quiescent current i out1 = 10 ma outputs 2 and 3 disabled 2.2 3.0 ma v o1rst reset threshold voltage k = v out1 k-0.4 k-0.25 k-0.10 v v rth reset threshold hysteresis see circuit description. 30 75 120 mv t rd reset pulse delay c e = 100 nf see circuit description. 25 ms v rl saturation voltage in reset condition i reset = 5 ma 0.4 v i rh leakage current in normal condition, at reset pin v reset = 10 v 10 a k out1 k out2 k out3 output voltage thermal drift t j = 0 to 125c 100 ppm/c i out1sc short circuit output current v in1 = 7 v 0.8 1.3 1.8 a i out2sc short circuit output current v in1 = 7 v 0.8 1.3 1.8 a i out3sc short circuit output current v in3 = 10 v 0.8 1.3 1.8 a v dish voltage high level at disable pin (outputs 2 and 3 active) 2 v v disl voltage low level at disable pin (outputs 2 and 3 disabled) 0.8 v i dis bias current at disable pin 0 v < v disable < 7 v -100 2 a t jsd junction temperature for thermal shutdown 150 c t sdh thermal shutdown temperature hysteresis 15 c symbol parameter test conditions min. typ. max. unit k out v out 10 6 tv out -------------------------------- = .com .com .com .com
5/12 stv8162 - STV8162D circuit description 3 circuit description the stv8162 and STV8162D are triple-voltage regulators with reset and disable functions. the three regulation parts are supplied from a single voltage reference circuit trimmed by zener zapping during ews testing. since the supply voltage of this voltage reference is connected to pin input1 (v in1 ), the second and third regulators will not work if pin input1 is not supplied. the output stages are designed using a darlington configuration with a typical dropout voltage of 1.0 v. important: in all applications, all three inputs must be polarized. if outputs 2 or 3 are not used, the corresponding inputs must be connected to input 1. the disable circuit will switch off pins output2 and output3 if a voltage less than 0.8 v is applied to pin disable . the reset circuit checks the voltage at pin output1. if this voltage drops below v out1 -0.25 v (4.75 v typ.), the "a" comparator ( figure 3 ) rapidly discharges the external capacitor (ce) and the reset output immediately switches to low. when the voltage at pin output1 exceeds v out1 -0.175 v (4.825 v typ.), the v ce voltage increases linearly to the reference voltage (v ref = 2.5 v) corresponding to a reset pulse delay (t rd ) as shown in figure 4 . afterwards, the reset output returns to high. to avoid glitches in the reset output, the second comparator "b" has a large hysteresis (1.9 v). t rd c e 2.5v 10 a ------------------------- - = .com .com .com .com
application diagrams stv8162 - STV8162D 6/12 4 application diagrams figure 3: reset diagram figure 4: internal reset voltage output1 reg v ref - + a + - ce v ref 0.6v b reset 10 a 3 v ref = 2.5 v reset k v rth v o1rst t rd t rd v out1 power on power off k = actual value of v out1 .com .com .com .com
7/12 stv8162 - STV8162D application diagrams figure 5: stv8162 typical application figure 6: STV8162D typical application 1 2 9 7 ce 0.1 f c2 c3 c1 to c6 = 10 f output2 output3 input2 input3 5 8 10 reset delay capacitor disable ground 11 v out1 v out2 4 input1 output1 3 6 v in1 v in2 v in3 c1 v out3 c5 c6 c4 nc 1 2 8 6 ce 0.1 f c2 c3 c1 to c6 = 10 f output2 output3 input2 input3 5 7 9 reset delay capacitor disable ground v out1 v out2 4 input1 output1 3 v in1 v in2 v in3 c1 v out3 c5 c6 c4 pins 10 to 18 .com .com .com .com
power dissipation and layout indications stv8162 - STV8162D 8/12 5 power dissipation and layout indications the power is mainly dissipated by the three device buffers. it can be calculated by the equation: p = (v in1 -v out1 ) x i out1 + (v in2 -v out2 ) x i out2 + (v in3 -v out3 ) x i out3 the following table lists the different r thja values of these packages with or without a heat sink and the corresponding maximum power dissipation assuming: maximum ambient temperature = 70 c maximum junction temperature = 140 c device heat sink r thja in c/w p max in w stv8162 no 50 1.4 ye s 1 5 4 . 6 STV8162D no 56 to 40 1.25 to 1.75 ye s 3 2 2 . 2 figure 7: thermal resistance (junction-to-ambient) of dip18 package without heat sink figure 8: metal plate mounted near the STV8162D for heat sinking copper area (cm2) (35 m plus solder) board is face-down to optimize the thermal conductivity of the copper layer and the exchanges with the air, the solder must cover the maximum amount of this area. 60 rthja c/w 40 50 10 12 0 55 45 24 8 6 test board with ?on board? square heat sink area. top view bottom view .com .com .com .com
9/12 stv8162 - STV8162D package mechanical data 6 package mechanical data figure 9: 11-pin plastic clipwatt package dim. mm inches min. typ. max. min. typ. max. a 3.20 0.126 b 1.05 0.041 c 0.15 0.006 d 1.50 0.059 e 0.49 0.55 0.019 0.002 f 0.80 0.91 0.031 0.036 g 1.57 1.70 1.83 0.062 0.067 0.072 h1 12.00 0.480 h2 18.60 0.732 h3 19.85 0.781 l 17.90 0.700 l1 14.45 0.569 l2 10.70 11.00 11.20 0.421 0.433 0.441 l3 5.50 0.217 m 2.54 0.100 m1 2.54 0.100 number of pins n 11 b d l l1 l2 e m1 m c a a h3 h1 f g1 g .com .com .com .com
package mechanical data stv8162 - STV8162D 10/12 figure 10: 18-pin plastic du al in-line power package dim. mm inches min. typ. max. min. typ. max. a 5.33 0.210 a1 0.38 0.015 a2 2.92 3.30 4.95 0.115 0.130 0.195 b 0.36 0.46 0.56 0.014 0.018 0.022 b2 1.14 1.52 1.78 0.045 0.060 0.070 b3 0.76 0.99 1.14 0.030 0.039 0.045 c 0.20 0.25 0.36 0.008 0.010 0.014 d 22.35 22.86 23.37 0.880 0.900 0.920 d1 0.13 0.005 e 2.54 0.100 eb 10.92 0.430 e 7.62 7.87 8.26 0.300 0.310 0.325 e1 6.10 6.35 7.11 0.240 0.250 0.280 l 2.92 3.30 3.81 0.115 0.130 0.150 9 d1 b3 b eb c e 1 10 18 d e e1 a a1 l a2 b2 .com .com .com .com
11/12 stv8162 - STV8162D revision history 7 revision history table 1: summary of modifications version date main changes 0.2 january 2000 first edition 0.3 november 2002 addition of pdip18 package. .com .com .com .com
revision history stv8162 - STV8162D 12/12 notes: information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information pr eviously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems with out express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states www.st.com .com .com .com

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